An efficient architecture for an OpenFlow switch in FPGA based platform

Toluee, Shahab (2017) An efficient architecture for an OpenFlow switch in FPGA based platform. Masters thesis, University of Mohaghegh Ardabili.

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Abstract

The current architectures of comouter networks are static and unprogramable. So it is difficult to test new ideas for research community in the area of computer networks. This is because the source code of the software running on the network switches can not be changed and the network infrastructure will not work when new network ideas can not be tested in real traffic environments. So the need for a new design and architecture that will cover growing needs of computer networks is inevitable. Software-Defined networks (SDNs) have emerged as the main ideas and plans for responding to these needs. The main protocol introduced for this kind of networks is called ((OpenFlow)) which has attracted considerable attention from researchers due its flexibility and applications. The need for reprogramming switches based on the nature of Software-Defined networks and finding the appropriate content for implementing it, are one of the main chalenges of this networks. Given the nature of these types of networks as well as benefits and capabilities of FPGA based platforms including the ability to reprogram and re-merge resources, these type of switches can be implement on FPGA based platforms using the VHDL hardware description language. Finding an optimal architecture for implement controll and data plane of OpenFlow switches to reduce resource consumption and optimizing other performance metric and measure and evaluate quantitative and qualitative results of simulations and imolementations will be another chalenge for this research.

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